The present invention relates, in general, to semiconductor devices and, more particularly, to a heterojunction semiconductor device having a complementary structure.
Existing digital integrated circuits are usually designed using metal oxide semiconductors (MOSs) having a logical on or off state. Typically, these designs are implemented using well-known complementary MOS (CMOS) circuits. However, the use of such two-state MOS devices makes further integration of devices with ever smaller geometries difficult when the critical dimensions of these devices become sufficiently small that electron tunneling begins to occur between critical portions of the devices.
As device geometries shrink, it is preferable to design integrated circuits using devices having more functionality than that provided by the two stable logical states of conventional CMOS transistors. An example of a device having more than two-state functionality is a resonant interband tunneling transistor (RITT). An RITT is able to replace two or more conventional two-state transistors and can be used to further increase the density of an integrated circuit. However, as of yet, RITTs have not been provided in a complementary structure analogous to that used in conventional CMOS circuits. Another limitation of CMOS devices is that their switching speed, such as observed in a simple inverter, is limited by the slower, p-channel transistor. It would be preferable for both transistors of a complementary transistor pair to operate at a speed substantially equal to that of an n-channel transistor.
Therefore, it is desirable to have a heterojunction semiconductor device that has a complementary structure, that provides more than two-state functionality, and that provides a complementary pair of devices, each of which operates at a high speed.